RT-Thread-STM32H7R7(ART-Pi2)运行CherryUSBRT-Thread问答社区

STM32H7R7(ART-Pi2)运行CherryUSB

发布于 2024-12-12 20:51:46 浏览：1651 订阅该版

[tocm]

# 一、随着越来越多mcu的usb自带hs phy，stm32也出了一款stm32h7r7，它自带usb hs phy。所以尝试用它运行cherryusb。下面是创建构建的工程与处理遇到问题的详细过程。

# 二、使用cubemx创建keil工程
1、我手头的是stm32h7r7l8hxh

2、配置rcc、sys（注：我们只配置Boot下的配置，不勾选App的）
![rcc.png](https://oss-club.rt-thread.org/uploads/20241212/4f0584326bab6911a5ca4fe0b53ecdce.png.webp)

3、关闭MPU且不启用cache，简化操作，usb缓冲要放到noncacheable
![mpu.png](https://oss-club.rt-thread.org/uploads/20241212/e0517634d478fa57f88153b3da0b8239.png.webp)

4、配置uart usb（记得在配置勾选usb otg hs 中断）（usb用到PM5 PM6引脚不需要额外的初始化）
![usb.png](https://oss-club.rt-thread.org/uploads/20241212/ab0f2648df50f38ce37492a654e0f3ed.png.webp)

5、勾选debug
![debug.png](https://oss-club.rt-thread.org/uploads/20241212/401a9b34c0a319addce02c1f4032a455.png.webp)

6、配置时钟
![clock00.png](https://oss-club.rt-thread.org/uploads/20241212/d6c728956be138c4fd09ffb845b03510.png.webp)
![clock01.png](https://oss-club.rt-thread.org/uploads/20241212/83d69890a6fc8c4416780f27738506db.png)

7、工程选项
![proj00.png](https://oss-club.rt-thread.org/uploads/20241212/df32d647d89d041bce14a2212cf049a7.png.webp)
![proj01.png](https://oss-club.rt-thread.org/uploads/20241212/cba1aa9f19bcfad10e1f1c55695e953c.png)

# 三、向keil工程添加cherryUSB源代码文件
1、添加cherryusb文件和头文件路径
![file.png](https://oss-club.rt-thread.org/uploads/20241212/f143275f81a75b9131d67a960fe1eb99.png)
![h.png](https://oss-club.rt-thread.org/uploads/20241212/3e8bb8992e7885098451751b1f4eb758.png)

2、修改usb中断函数
![irq.png](https://oss-club.rt-thread.org/uploads/20241212/3d4620e825a0b66013437b5d284ea4f0.png.webp)
```c
void OTG_HS_IRQHandler(void)
{
  /* USER CODE BEGIN OTG_HS_IRQn 0 */

/* USER CODE END OTG_HS_IRQn 0 */
  // HAL_PCD_IRQHandler(&hpcd_USB_OTG_HS);
  /* USER CODE BEGIN OTG_HS_IRQn 1 */
  extern void USBD_IRQHandler(uint8_t busid);
  USBD_IRQHandler(0);

/* USER CODE END OTG_HS_IRQn 1 */
}
```

3、添加代码，使得keil的printf函数输出到uart外设
![uartcode.png](https://oss-club.rt-thread.org/uploads/20241212/399ce6a229bb697b89a0d6546ed362a0.png.webp)
```c
/* USER CODE BEGIN 1 */
#include <stdint.h>
#include <stdio.h>
#include <rt_misc.h>
__asm(".global __use_no_semihosting");
//struct __FILE { int handle; /* Add whatever you need here */ };
FILE __stdout;
FILE __stdin;

int fputc(int c, FILE *f)
{
  HAL_UART_Transmit(&huart4, (uint8_t *)&c, 1, 1000);
  return (c);
}

int fgetc(FILE *f)
{
  return EOF;
}

int ferror(FILE *f)
{
  /* Your implementation of ferror */
  return EOF;
}

void _ttywrch(int c)
{
  HAL_UART_Transmit(&huart4, (uint8_t *)&c, 1, 1000);
}

void _sys_exit(int return_code)
{
label:
  goto label; /* endless loop */
}
/* USER CODE END 1 */
```

4、添加CherryUSB底层初始化代码
![usbinit.png](https://oss-club.rt-thread.org/uploads/20241212/5b149b3d02e2a7b0368d3661def68779.png.webp)

```c
/* USER CODE BEGIN 1 */
void usb_dc_low_level_init(uint8_t busid)
{
	// MX_USB_OTG_HS_PCD_Init();
  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USBPHYC;
  PeriphClkInit.UsbPhycClockSelection = RCC_USBPHYCCLKSOURCE_HSE;
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  {
    Error_Handler();
  }
  HAL_PWREx_EnableUSBVoltageDetector();
  /* Enable the USB HS regulator. */
  HAL_PWREx_EnableUSBHSregulator();
  /* USB_OTG_HS clock enable */
  __HAL_RCC_USB_OTG_HS_CLK_ENABLE();
  __HAL_RCC_USBPHYC_CLK_ENABLE();

/* USB_OTG_HS interrupt Init */
  HAL_NVIC_SetPriority(OTG_HS_IRQn, 0, 0);
  HAL_NVIC_EnableIRQ(OTG_HS_IRQn);
}
void usb_dc_low_level_deinit(uint8_t busid)
{
	HAL_PCD_DeInit(&hpcd_USB_OTG_HS);
}
/* USER CODE END 1 */
```

5、添加修改main函数 （注释掉main函数中的MX_USB_OTG_HS_PCD_Init()）
![main.png](https://oss-club.rt-thread.org/uploads/20241212/5ffd89f37d8d73ce3be4d76f38e74ec5.png.webp)
```c
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <stdio.h>
#include "usb_config.h"
/* USER CODE END Includes */
	
	
	
// MX_USB_OTG_HS_PCD_Init();
/* USER CODE BEGIN 2 */
printf("ART_Pi2 CherryUSB demo \r\n");
extern void cdc_acm_msc_init(uint8_t busid, uint32_t reg_base);
cdc_acm_msc_init(0, USB_OTG_HS_PERIPH_BASE);
/* USER CODE END 2 */

/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
  extern void cdc_acm_data_send_with_dtr_test(uint8_t busid);
  cdc_acm_data_send_with_dtr_test(0);
  HAL_Delay(500);
  /* USER CODE END WHILE */

/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
```

6、复制一份usb_config.h到工程里，开始构建代码。

# 四、其他问题
1、cherryusb开始运行了，串口输出也没提示错误，但是不枚举
![bug00.png](https://oss-club.rt-thread.org/uploads/20241212/b7953fedbde7ee8c663ea43694f4f125.png.webp)
修改usb_glue_st.c文件，return 0 -> return 1 << 21
```c
uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base)
{
#if __has_include("stm32h7xx.h") || __has_include("stm32f7xx.h") || __has_include("stm32l4xx.h")
#define USB_OTG_GLB ((DWC2_GlobalTypeDef *)(reg_base))
    /* B-peripheral session valid override enable */
    USB_OTG_GLB->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
    USB_OTG_GLB->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
#endif

#ifdef CONFIG_USB_HS
#if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F732xx) || defined(STM32F733xx)
    USB_OTG_GLB->GCCFG = (1 << 23);
    usb_hsphy_init(25000000U);

return (1 << 23);    /* Enable USB HS PHY USBx->GCCFG |= USB_OTG_GCCFG_PHYHSEN;*/
#else
    return (1 << 21);
    //return 0;
#endif
#else
#if __has_include("stm32h7xx.h") || __has_include("stm32f7xx.h") || __has_include("stm32l4xx.h")
    return (1 << 16);
#else
    return ((1 << 16) | (1 << 21));
#endif
#endif
}
```

2、提示枚举成功，但fifo溢出
![bug01.png](https://oss-club.rt-thread.org/uploads/20241212/b9de6b8119e3c1a3f625b49286eea1a4.png.webp)
修改usb_config.h文件，取消注释，并修改CONFIG_USB_DWC2_TX4_FIFO_SIZE的值
```c
/* ---------------- DWC2 Configuration ---------------- */
#define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
#define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
#define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4)
#define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
#define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
#define CONFIG_USB_DWC2_TX4_FIFO_SIZE (512 / 4)
#define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
#define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
#define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
#define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)
```
运行成功
![ok.png](https://oss-club.rt-thread.org/uploads/20241212/1e289ee58a63a6790a40a3c2b8b2332a.png)
usb_config.h代码

```c
/*
 * Copyright (c) 2022, sakumisu
 *
 * SPDX-License-Identifier: Apache-2.0
 */
#ifndef CHERRYUSB_CONFIG_H
#define CHERRYUSB_CONFIG_H

/* ================ USB common Configuration ================ */

#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__)

#ifndef CONFIG_USB_DBG_LEVEL
#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO
#endif

/* Enable print with color */
#define CONFIG_USB_PRINTF_COLOR_ENABLE

/* data align size when use dma */
#ifndef CONFIG_USB_ALIGN_SIZE
#define CONFIG_USB_ALIGN_SIZE 4
#endif

/* attribute data into no cache ram */
#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable")))

/* ================= USB Device Stack Configuration ================ */

/* Ep0 in and out transfer buffer */
#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN
#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512
#endif

/* Setup packet log for debug */
// #define CONFIG_USBDEV_SETUP_LOG_PRINT

/* Check if the input descriptor is correct */
// #define CONFIG_USBDEV_DESC_CHECK

/* Enable test mode */
// #define CONFIG_USBDEV_TEST_MODE

#ifndef CONFIG_USBDEV_MSC_MAX_LUN
#define CONFIG_USBDEV_MSC_MAX_LUN 1
#endif

#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE
#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 512
#endif

#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING
#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING ""
#endif

#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING
#define CONFIG_USBDEV_MSC_PRODUCT_STRING ""
#endif

#ifndef CONFIG_USBDEV_MSC_VERSION_STRING
#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01"
#endif

// #define CONFIG_USBDEV_MSC_THREAD

#ifndef CONFIG_USBDEV_MSC_PRIO
#define CONFIG_USBDEV_MSC_PRIO 4
#endif

#ifndef CONFIG_USBDEV_MSC_STACKSIZE
#define CONFIG_USBDEV_MSC_STACKSIZE 2048
#endif

#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE
#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156
#endif

#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE
#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 2048
#endif

#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID
#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff
#endif

#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC
#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB"
#endif

#define CONFIG_USBDEV_RNDIS_USING_LWIP

/* ================ USB HOST Stack Configuration ================== */

#define CONFIG_USBHOST_MAX_RHPORTS          1
#define CONFIG_USBHOST_MAX_EXTHUBS          1
#define CONFIG_USBHOST_MAX_EHPORTS          4
#define CONFIG_USBHOST_MAX_INTERFACES       8
#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8
#define CONFIG_USBHOST_MAX_ENDPOINTS        4

#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4
#define CONFIG_USBHOST_MAX_HID_CLASS     4
#define CONFIG_USBHOST_MAX_MSC_CLASS     2
#define CONFIG_USBHOST_MAX_AUDIO_CLASS   1
#define CONFIG_USBHOST_MAX_VIDEO_CLASS   1

#define CONFIG_USBHOST_DEV_NAMELEN 16

#ifndef CONFIG_USBHOST_PSC_PRIO
#define CONFIG_USBHOST_PSC_PRIO 0
#endif
#ifndef CONFIG_USBHOST_PSC_STACKSIZE
#define CONFIG_USBHOST_PSC_STACKSIZE 2048
#endif

//#define CONFIG_USBHOST_GET_STRING_DESC

// #define CONFIG_USBHOST_MSOS_ENABLE
#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE
#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00
#endif

/* Ep0 max transfer buffer */
#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN
#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512
#endif

#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT
#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500
#endif

#ifndef CONFIG_USBHOST_MSC_TIMEOUT
#define CONFIG_USBHOST_MSC_TIMEOUT 5000
#endif

/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
 * you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS
 */
#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE
#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048)
#endif
#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE
#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048)
#endif

/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
 * you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS
 */
#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE
#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048)
#endif
#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE
#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048)
#endif

#define CONFIG_USBHOST_BLUETOOTH_HCI_H4
// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG

#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE
#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048
#endif
#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE
#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048
#endif

/* ================ USB Device Port Configuration ================*/

#ifndef CONFIG_USBDEV_MAX_BUS
#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip
#endif

#ifndef CONFIG_USBDEV_EP_NUM
#define CONFIG_USBDEV_EP_NUM 6
#endif

/* ---------------- FSDEV Configuration ---------------- */
//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference

/* ---------------- DWC2 Configuration ---------------- */
#define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
#define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
#define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4)
#define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
#define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
#define CONFIG_USB_DWC2_TX4_FIFO_SIZE (512 / 4)
#define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
#define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
#define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
#define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)

/* ---------------- MUSB Configuration ---------------- */
// #define CONFIG_USB_MUSB_SUNXI

/* ================ USB Host Port Configuration ==================*/
#ifndef CONFIG_USBHOST_MAX_BUS
#define CONFIG_USBHOST_MAX_BUS 1
#endif

#ifndef CONFIG_USBHOST_PIPE_NUM
#define CONFIG_USBHOST_PIPE_NUM 12
#endif

/* ---------------- EHCI Configuration ---------------- */

#define CONFIG_USB_EHCI_HCCR_OFFSET     (0x0)
#define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024
#define CONFIG_USB_EHCI_QH_NUM          CONFIG_USBHOST_PIPE_NUM
#define CONFIG_USB_EHCI_QTD_NUM         3
#define CONFIG_USB_EHCI_ITD_NUM         20
// #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE
// #define CONFIG_USB_EHCI_CONFIGFLAG
// #define CONFIG_USB_EHCI_ISO
// #define CONFIG_USB_EHCI_WITH_OHCI

/* ---------------- OHCI Configuration ---------------- */
#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0)

/* ---------------- XHCI Configuration ---------------- */
#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)

/* ---------------- DWC2 Configuration ---------------- */
/* largest non-periodic USB packet used / 4 */
// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4)
/* largest periodic USB packet used / 4 */
// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4)
/*
 * (largest USB packet used / 4) + 1 for status information + 1 transfer complete +
 * 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario
 */
// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE))

/* ---------------- MUSB Configuration ---------------- */
// #define CONFIG_USB_MUSB_SUNXI

#define CONFIG_USB_HS

#endif

```