LPC1756 finsh 不可用

发布于 2014-10-09 11:57:23 浏览：2001 订阅该版

3 个回答

pangwei 2014-10-09

这家伙很懒，什么也没写！

qq_令狐 2014-10-09

这家伙很懒，什么也没写！

```
void rt_hw_uart_init(void)
{
	struct rt_uart_lpc* uart;

/* get uart device */
	uart = &uart_device;

/* device initialization */
	uart->parent.type = RT_Device_Class_Char;
	rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
	uart->read_index = uart->save_index = 0;

/* device interface */
	uart->parent.init 	    = rt_uart_init;
	uart->parent.open 	    = rt_uart_open;
	uart->parent.close      = rt_uart_close;
	uart->parent.read 	    = rt_uart_read;
	uart->parent.write      = rt_uart_write;
	uart->parent.control    = RT_NULL;
	uart->parent.user_data  = RT_NULL;

rt_device_register(&uart->parent,
		"uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX);
}

static rt_err_t rt_uart_init (rt_device_t dev)
{
	rt_uint32_t Fdiv;
	rt_uint32_t pclkdiv, pclk;

/* Init UART Hardware */
	if (LPC_UART == LPC_UART0)
	{
		LPC_PINCON->PINSEL0 &= ~0x000000F0;
		LPC_PINCON->PINSEL0 |= 0x00000050;  /* RxD0 is P0.3 and TxD0 is P0.2 */
		/* By default, the PCLKSELx value is zero, thus, the PCLK for
		all the peripherals is 1/4 of the SystemFrequency. */
		/* Bit 6~7 is for UART0 */
		pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03;
		switch ( pclkdiv )
		{
		  case 0x00:
		  default:
			pclk = SystemCoreClock/4;
			break;
		  case 0x01:
			pclk = SystemCoreClock;
			break; 
		  case 0x02:
			pclk = SystemCoreClock/2;
			break; 
		  case 0x03:
			pclk = SystemCoreClock/8;
			break;
		}
	
	    LPC_UART0->LCR = 0x83;		/* 8 bits, no Parity, 1 Stop bit */
		Fdiv = ( pclk / 16 ) / UART_BAUDRATE;	/*baud rate */
	    LPC_UART0->DLM = Fdiv / 256;							
	    LPC_UART0->DLL = Fdiv % 256;
		LPC_UART0->LCR = 0x03;		/* DLAB = 0 */
	    LPC_UART0->FCR = 0x07;		/* Enable and reset TX and RX FIFO. */
	}
	else if ((LPC_UART1_TypeDef*)LPC_UART == LPC_UART1)
	{
		LPC_PINCON->PINSEL4 &= ~0x0000000F;
		LPC_PINCON->PINSEL4 |= 0x0000000A;	/* Enable RxD1 P2.1, TxD1 P2.0 */
		
		/* By default, the PCLKSELx value is zero, thus, the PCLK for
		all the peripherals is 1/4 of the SystemFrequency. */
		/* Bit 8,9 are for UART1 */
		pclkdiv = (LPC_SC->PCLKSEL0 >> 8) & 0x03;
		switch ( pclkdiv )
		{
		  case 0x00:
		  default:
			pclk = SystemCoreClock/4;
			break;
		  case 0x01:
			pclk = SystemCoreClock;
			break; 
		  case 0x02:
			pclk = SystemCoreClock/2;
			break; 
		  case 0x03:
			pclk = SystemCoreClock/8;
			break;
		}
	
	    LPC_UART1->LCR = 0x83;		/* 8 bits, no Parity, 1 Stop bit */
		Fdiv = ( pclk / 16 ) / UART_BAUDRATE ;	/*baud rate */
	    LPC_UART1->DLM = Fdiv / 256;							
	    LPC_UART1->DLL = Fdiv % 256;
		LPC_UART1->LCR = 0x03;		/* DLAB = 0 */
	    LPC_UART1->FCR = 0x07;		/* Enable and reset TX and RX FIFO. */
	}

/* Ensure a clean start, no data in either TX or RX FIFO. */
	while (( LPC_UART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
	while ( LPC_UART->LSR & LSR_RDR )
	{
		Fdiv = LPC_UART->RBR;	/* Dump data from RX FIFO */
	}
	LPC_UART->IER = IER_RBR | IER_THRE | IER_RLS;	/* Enable UART interrupt */

return RT_EOK;
}

#define UART_BAUDRATE   115200
#define LPC_UART		LPC_UART0
```

我硬件也是用的UART0  P0.2 TXD0，P0.3 RXD0  
已经有输出 log 的，没有系统下已经测过CPU  RXD0 （串口工具下载数据到板子上）。