检查发现断言在rt_mutex_take中写的RT_DEBUG_SCHEDULER_AVAILABLE(RT_TRUE);主要是if (rt_critical_level() != 0)通不过，初步分析freemodbus中有关同步用得不好。
当前测试时将rtconfig.h中的#define RT_DEBUG注释掉可以暂时运行，需要继续查找freemodbus中的问题或待其修复。

按这个[https://club.rt-thread.org/ask/article/2752.html]RTT-STUDIO CAN总线通讯基本没有问题，注意一下时钟速率，波特率，还有接线方式，我的F407ZG6调试正常。附上我的时钟和波特率配置（板载8M晶振）。
时钟配置：
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

/* Configure the main internal regulator output voltage /
HAL_RCC_PWR_CLK_ENABLE(); HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

/** Initializes the RCC Oscillators according to the specified parameters

• in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE

                        |RCC_OSCILLATORTYPE_LSE;
  

  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.LSEState = RCC_LSE_ON;
  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLM = 4;
  RCC_OscInitStruct.PLL.PLLN = 72;
  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  RCC_OscInitStruct.PLL.PLLQ = 3;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
  Error_Handler();
  }

  /* Initializes the CPU, AHB and APB buses clocks /
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK

                        |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  

  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
  {
  Error_Handler();
  }
  }
  波特率配置（drv_can.c中）：
  static const struct stm32_baud_rate_tab can_baud_rate_tab[] =
  {
  {CAN1MBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 4)},
  {CAN800kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 5)},
  {CAN500kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 8)},
  {CAN250kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 16)},
  {CAN125kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 32)},
  {CAN100kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 40)},
  {CAN50kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 80)},
  {CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 200)},
  {CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_5TQ | 400)}
  };