Toggle navigation
首页
问答
文章
积分商城
专家
专区
更多专区...
文档中心
返回主站
搜索
提问
会员
中心
登录
注册
RT-Thread一般讨论
IAR中移植到K60时icf配置问题
发布于 2013-09-27 11:28:07 浏览：5492
订阅该版
[tocm] 请教，初次使用RTT，在IAR中移植到k60DN512（512KB flash，128KB RAM）的系统中，debug调试下载时IAR总是提示我尝试修改写保护（Your application image would set the system security of the device.This is not supported in the current configuration.Application data has been changed accordingly.），每次烧写完后，k60都会锁住。后来发现，当我注释rt_memset之类的函数时，这个提示不会出现。 icf文件配置如下 ```/*###ICF### Section handled by ICF editor, don't touch! ****/ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$configideIcfEditorcortex_v1_0.xml" */ /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = 0x00000000; /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; define symbol __ICFEDIT_region_ROM_end__ = 0x0007FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x1FFF0000; define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x200; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; initialize by copy { readwrite }; do not initialize { section .noinit }; do not initialize { section USB_DMA_RAM }; keep { section FSymTab }; keep { section VSymTab }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in RAM_region { readwrite, block CSTACK, last block HEAP}; ``` 我担心是icf配置不对引起的，请帮忙分析下，我使用的事RT 1.1.1版本，IAR版本6.5，尚未RTT修改源码部分
查看更多
3
个回答
默认排序
按发布时间排序
fishlee
2013-10-12
这家伙很懒，什么也没写！
查找问题了，kinetis系列的cpu在0xC04的位置上设定了存储器的读写保护，所以需要保证这个位置上的值是对的。 需要修改下启动汇编的前410个字节（基本都是中断向量的声明），之前因为没有声明完全，导致主程序的执行体占用了读写保护位置，所以有时候能烧写一次，然后再次尝试烧写时cpu就锁住了 ``` MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:ROOT(2) EXTERN __iar_program_start PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) ; Top of Stack DCD __iar_program_start ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DMA0_IRQHandler ; 0: DMA Channel 0 transfer complete DCD DMA1_IRQHandler ; 1: DMA Channel 1 transfer complete DCD DMA2_IRQHandler ; 2: DMA Channel 2 transfer complete DCD DMA3_IRQHandler ; 3: DMA Channel 3 transfer complete DCD DMA4_IRQHandler ; 4: DMA Channel 4 transfer complete DCD DMA5_IRQHandler ; 5: DMA Channel 5 transfer complete DCD DMA6_IRQHandler ; 6: DMA Channel 6 transfer complete DCD DMA7_IRQHandler ; 7: DMA Channel 7 transfer complete DCD DMA8_IRQHandler ; 8: DMA Channel 8 transfer complete DCD DMA9_IRQHandler ; 9: DMA Channel 9 transfer complete DCD DMA10_IRQHandler ;10: DMA Channel 10 transfer complete DCD DMA11_IRQHandler ;11: DMA Channel 11 transfer complete DCD DMA12_IRQHandler ;12: DMA Channel 12 transfer complete DCD DMA13_IRQHandler ;13: DMA Channel 13 transfer complete DCD DMA14_IRQHandler ;14: DMA Channel 14 transfer complete DCD DMA15_IRQHandler ;15: DMA Channel 15 transfer complete DCD DMA_ERR_IRQHandler ;16: DMA Error Interrupt Channels 0-15 DCD MCM_IRQHandler ;17: MCM Normal interrupt DCD FLASH_CC_IRQHandler ;18: Flash memory command complete DCD FLASH_RC_IRQHandler ;19: Flash memory read collision DCD VLD_IRQHandler ;20: Low Voltage Detect, Low Voltage Warning DCD LLWU_IRQHandler ;21: Low Leakage Wakeup DCD WDOG_IRQHandler ;22: WDOG interrupt DCD RNGB_IRQHandler ;23: Random number generator (RNGB) DCD I2C0_IRQHandler ;24: I2C0 interrupt DCD I2C1_IRQHandler ;25: I2C1 interrupt DCD SPI0_IRQHandler ;26: SPI 0 interrupt DCD SPI1_IRQHandler ;27: SPI 1 interrupt DCD SPI2_IRQHandler ;28: SPI 2 interrupt DCD CAN0_MESS_IRQHandler ;29: CAM 0 OR'ed Message buffer (0-15) DCD CAN0_BUS_OFF_IRQHandler ;30: CAM 0 Bus Off DCD CAN0_ERR_IRQHandler ;31: CAM 0 Error DCD CAN0_TW_IRQHandler ;32: CAM 0 Transmit Warning DCD CAN0_RW_IRQHandler ;33: CAM 0 Receive Warning DCD CAN0_WAKE_UP_IRQHandler ;34: CAM 0 WakeUp DCD CAN0_IMEU_IRQHandler ;35: CAM 0 Individual Matching Elements Update (IMEU) DCD CAN0_LR_IRQHandler ;36: CAM 0 Lost receive DCD CAN1_MESS_IRQHandler ;37: CAM 1 OR'ed Message buffer (0-15) DCD CAN1_BUS_OFF_IRQHandler ;38: CAM 1 Bus Off DCD CAN1_ERR_IRQHandler ;39: CAM 1 Error DCD CAN1_TW_IRQHandler ;40: CAM 1 Transmit Warning DCD CAN1_RW_IRQHandler ;41: CAM 1 Receive Warning DCD CAN1_WAKE_UP_IRQHandler ;42: CAM 1 WakeUp DCD CAN1_IMEU_IRQHandler ;43: CAM 1 Individual Matching Elements Update (IMEU) DCD CAN1_LR_IRQHandler ;44: CAM 1 Lost receive DCD UART0_IRQHandler ;45: UART 0 intertrupt DCD UART0_ERR_IRQHandler ;46: UART 0 error intertrupt DCD UART1_IRQHandler ;47: UART 1 intertrupt DCD UART1_ERR_IRQHandler ;48: UART 1 error intertrupt DCD UART2_IRQHandler ;49: UART 2 intertrupt DCD UART2_ERR_IRQHandler ;50: UART 2 error intertrupt DCD UART3_IRQHandler ;51: UART 3 intertrupt DCD UART3_ERR_IRQHandler ;52: UART 3 error intertrupt DCD UART4_IRQHandler ;53: UART 4 intertrupt DCD UART4_ERR_IRQHandler ;54: UART 4 error intertrupt DCD UART5_IRQHandler ;55: UART 5 intertrupt DCD UART5_ERR_IRQHandler ;56: UART 5 error intertrupt DCD ADC0_IRQHandler ;57: ADC 0 interrupt DCD ADC1_IRQHandler ;58: ADC 1 interrupt DCD CMP0_IRQHandler ;59: CMP 0 High-speed comparator interrupt DCD CMP1_IRQHandler ;60: CMP 1 interrupt DCD CMP2_IRQHandler ;61: CMP 2 interrupt DCD FTM0_IRQHandler ;62: FTM 0 interrupt DCD FTM1_IRQHandler ;63: FTM 1 interrupt DCD FTM2_IRQHandler ;64: FTM 2 interrupt DCD CMT_IRQHandler ;65: CMT intrrupt DCD RTC_IRQHandler ;66: RTC interrupt DCD 0 ;67: Reserved DCD PIT0_IRQHandler ;68: PIT 0 interrupt DCD PIT1_IRQHandler ;69: PIT 1 interrupt DCD PIT2_IRQHandler ;70: PIT 2 interrupt DCD PIT3_IRQHandler ;71: PIT 3 interrupt DCD PDB_IRQHandler ;72: PDB interrupt DCD USB_OTG_IRQHandler ;73: USB OTG interrupt DCD USB_CD_IRQHandler ;74: USB Charger Detect interrupt DCD Eth_IEEE1588_IRQHandler ;75: IEEE 1588 Timer Interrupt DCD Eth_TX_IRQHandler ;76: Transmit interrupt DCD Eth_RX_IRQHandler ;77: Receive interrupt DCD Eth_Err_Misc_IRQHandler ;78: Error and miscellaneous interrupt DCD I2S_IRQHandler ;79: I2S interrupt DCD SDHC_IRQHandler ;80: SDHC interrupt DCD DAC0_IRQHandler ;81: DAC 0 interrupt DCD DAC1_IRQHandler ;82: DAC 1 interrupt DCD TSI_IRQHandler ;83: TSI interrupt DCD MCG_IRQHandler ;84: MCG interrupt DCD LPT_IRQHandler ;85: LPT interrupt DCD 0 ;86: Reserved DCD PORTA_IRQHandler ;87: PORT A interrupt DCD PORTB_IRQHandler ;88: PORT B interrupt DCD PORTC_IRQHandler ;89: PORT C interrupt DCD PORTD_IRQHandler ;90: PORT D interrupt DCD PORTE_IRQHandler ;91: PORT E interrupt DCD Default_Handler ;VECTOR_108 ; DCD Default_Handler ;VECTOR_109 ; DCD Default_Handler ;VECTOR_110 ; DCD Default_Handler ;VECTOR_111 ; DCD Default_Handler ;VECTOR_112 ; DCD Default_Handler ;VECTOR_113 ; DCD Default_Handler ;VECTOR_114 ; DCD Default_Handler ;VECTOR_115 ; DCD Default_Handler ;VECTOR_116 ; DCD Default_Handler ;VECTOR_117 ; DCD Default_Handler ;VECTOR_118 ; DCD Default_Handler ;VECTOR_119 ; DCD Default_Handler ;VECTOR_120 ; DCD Default_Handler ;VECTOR_121 ; DCD Default_Handler ;VECTOR_122 ; DCD Default_Handler ;VECTOR_123 ; DCD Default_Handler ;VECTOR_124 ; DCD Default_Handler ;VECTOR_125 ; DCD Default_Handler ;VECTOR_126 ; DCD Default_Handler ;VECTOR_127 ; DCD Default_Handler ;VECTOR_128 ; DCD Default_Handler ;VECTOR_129 ; DCD Default_Handler ;VECTOR_130 ; DCD Default_Handler ;VECTOR_131 ; DCD Default_Handler ;VECTOR_132 ; DCD Default_Handler ;VECTOR_133 ; DCD Default_Handler ;VECTOR_134 ; DCD Default_Handler ;VECTOR_135 ; DCD Default_Handler ;VECTOR_136 ; DCD Default_Handler ;VECTOR_137 ; DCD Default_Handler ;VECTOR_138 ; DCD Default_Handler ;VECTOR_139 ; DCD Default_Handler ;VECTOR_140 ; DCD Default_Handler ;VECTOR_141 ; DCD Default_Handler ;VECTOR_142 ; DCD Default_Handler ;VECTOR_143 ; DCD Default_Handler ;VECTOR_144 ; DCD Default_Handler ;VECTOR_145 ; DCD Default_Handler ;VECTOR_146 ; DCD Default_Handler ;VECTOR_147 ; DCD Default_Handler ;VECTOR_148 ; DCD Default_Handler ;VECTOR_149 ; DCD Default_Handler ;VECTOR_150 ; DCD Default_Handler ;VECTOR_151 ; DCD Default_Handler ;VECTOR_152 ; DCD Default_Handler ;VECTOR_153 ; DCD Default_Handler ;VECTOR_154 ; DCD Default_Handler ;VECTOR_155 ; DCD Default_Handler ;VECTOR_156 ; DCD Default_Handler ;VECTOR_157 ; DCD Default_Handler ;VECTOR_158 ; DCD Default_Handler ;VECTOR_159 ; DCD Default_Handler ;VECTOR_160 ; DCD Default_Handler ;VECTOR_161 ; DCD Default_Handler ;VECTOR_162 ; DCD Default_Handler ;VECTOR_163 ; DCD Default_Handler ;VECTOR_164 ; DCD Default_Handler ;VECTOR_165 ; DCD Default_Handler ;VECTOR_166 ; DCD Default_Handler ;VECTOR_167 ; DCD Default_Handler ;VECTOR_168 ; DCD Default_Handler ;VECTOR_169 ; DCD Default_Handler ;VECTOR_170 ; DCD Default_Handler ;VECTOR_171 ; DCD Default_Handler ;VECTOR_172 ; DCD Default_Handler ;VECTOR_173 ; DCD Default_Handler ;VECTOR_174 ; DCD Default_Handler ;VECTOR_175 ; DCD Default_Handler ;VECTOR_176 ; DCD Default_Handler ;VECTOR_177 ; DCD Default_Handler ;VECTOR_178 ; DCD Default_Handler ;VECTOR_179 ; DCD Default_Handler ;VECTOR_180 ; DCD Default_Handler ;VECTOR_181 ; DCD Default_Handler ;VECTOR_182 ; DCD Default_Handler ;VECTOR_183 ; DCD Default_Handler ;VECTOR_184 ; DCD Default_Handler ;VECTOR_185 ; DCD Default_Handler ;VECTOR_186 ; DCD Default_Handler ;VECTOR_187 ; DCD Default_Handler ;VECTOR_188 ; DCD Default_Handler ;VECTOR_189 ; DCD Default_Handler ;VECTOR_190 ; DCD Default_Handler ;VECTOR_191 ; DCD Default_Handler ;VECTOR_192 ; DCD Default_Handler ;VECTOR_193 ; DCD Default_Handler ;VECTOR_194 ; DCD Default_Handler ;VECTOR_195 ; DCD Default_Handler ;VECTOR_196 ; DCD Default_Handler ;VECTOR_197 ; DCD Default_Handler ;VECTOR_198 ; DCD Default_Handler ;VECTOR_199 ; DCD Default_Handler ;VECTOR_200 ; DCD Default_Handler ;VECTOR_201 ; DCD Default_Handler ;VECTOR_202 ; DCD Default_Handler ;VECTOR_203 ; DCD Default_Handler ;VECTOR_204 ; DCD Default_Handler ;VECTOR_205 ; DCD Default_Handler ;VECTOR_206 ; DCD Default_Handler ;VECTOR_207 ; DCD Default_Handler ;VECTOR_208 ; DCD Default_Handler ;VECTOR_209 ; DCD Default_Handler ;VECTOR_210 ; DCD Default_Handler ;VECTOR_211 ; DCD Default_Handler ;VECTOR_212 ; DCD Default_Handler ;VECTOR_213 ; DCD Default_Handler ;VECTOR_214 ; DCD Default_Handler ;VECTOR_215 ; DCD Default_Handler ;VECTOR_216 ; DCD Default_Handler ;VECTOR_217 ; DCD Default_Handler ;VECTOR_218 ; DCD Default_Handler ;VECTOR_219 ; DCD Default_Handler ;VECTOR_220 ; DCD Default_Handler ;VECTOR_221 ; DCD Default_Handler ;VECTOR_222 ; DCD Default_Handler ;VECTOR_223 ; DCD Default_Handler ;VECTOR_224 ; DCD Default_Handler ;VECTOR_225 ; DCD Default_Handler ;VECTOR_226 ; DCD Default_Handler ;VECTOR_227 ; DCD Default_Handler ;VECTOR_228 ; DCD Default_Handler ;VECTOR_229 ; DCD Default_Handler ;VECTOR_230 ; DCD Default_Handler ;VECTOR_231 ; DCD Default_Handler ;VECTOR_232 ; DCD Default_Handler ;VECTOR_233 ; DCD Default_Handler ;VECTOR_234 ; DCD Default_Handler ;VECTOR_235 ; DCD Default_Handler ;VECTOR_236 ; DCD Default_Handler ;VECTOR_237 ; DCD Default_Handler ;VECTOR_238 ; DCD Default_Handler ;VECTOR_239 ; DCD Default_Handler ;VECTOR_240 ; DCD Default_Handler ;VECTOR_241 ; DCD Default_Handler ;VECTOR_242 ; DCD Default_Handler ;VECTOR_243 ; DCD Default_Handler ;VECTOR_244 ; DCD Default_Handler ;VECTOR_245 ; DCD Default_Handler ;VECTOR_246 ; DCD Default_Handler ;VECTOR_247 ; DCD Default_Handler ;VECTOR_248 ; DCD Default_Handler ;VECTOR_249 ; DCD Default_Handler ;VECTOR_250 ; DCD Default_Handler ;VECTOR_251 ; DCD Default_Handler ;VECTOR_252 ; DCD Default_Handler ;VECTOR_253 ; DCD Default_Handler ;VECTOR_254 ; DCD Default_Handler ;VECTOR_255 ; DCD 0xffffffff ; /* Flash configuration field values */ DCD 0xffffffff ; /* Flash configuration field values */ DCD 0xffffffff ; /* Flash configuration field values */ DCD 0xfffffffe ; /* Flash configuration field values */ ``` 这样可以解决读写保护的问题
aozima
2013-10-12
调网络不抓包，调I2C等时序不上逻辑分析仪，就像电工不用万用表！多用整理的好的文字，比截图更省流量，还能在整理过程中思考。
不喜欢这种方式的MCU，要么浪费空间，要么使用很复杂的技术。
撰写答案
登录
注册新账号
关注者
0
被浏览
5.5k
关于作者
fishlee
这家伙很懒，什么也没写！
提问
1
回答
1
被采纳
0
关注TA
发私信
相关问题
1
有关动态模块加载的一篇论文
2
最近的调程序总结
3
晕掉了，这么久都不见layer2的踪影啊
4
继续K9ii的历程
5
[GUI相关] FreeType 2
6
[GUI相关]嵌入式系统中文输入法的设计
7
20081101 RT-Thread开发者聚会总结
8
嵌入式系统基础
9
linux2.4.19在at91rm9200 上的寄存器设置
10
[转]基于嵌入式Linux的通用触摸屏校准程序
推荐文章
1
RT-Thread应用项目汇总
2
玩转RT-Thread系列教程
3
国产MCU移植系列教程汇总，欢迎查看！
4
机器人操作系统 (ROS2) 和 RT-Thread 通信
5
五分钟玩转RT-Thread新社区
6
【技术三千问】之《玩转ART-Pi》，看这篇就够了！干货汇总
7
关于STM32H7开发板上使用SDIO接口驱动SD卡挂载文件系统的问题总结
8
STM32的“GPU”——DMA2D实例详解
9
RT-Thread隐藏的宝藏之completion
10
【ART-PI】RT-Thread 开启RTC 与 Alarm组件
最新文章
1
【NXP-MCXA153】 定时器驱动移植
2
GD32F450 看门狗驱动适配
3
【NXP-MCXA153】看门狗驱动移植
4
RT-Thread Studio V2.2.9 Release Note
5
CherryUSB的bootuf2配置
热门标签
RT-Thread Studio
串口
Env
LWIP
SPI
AT
Bootloader
Hardfault
CAN总线
FinSH
ART-Pi
USB
DMA
文件系统
RT-Thread
SCons
RT-Thread Nano
线程
MQTT
STM32
RTC
FAL
rt-smart
ESP8266
I2C_IIC
UART
WIZnet_W5500
ota在线升级
PWM
freemodbus
flash
cubemx
packages_软件包
BSP
潘多拉开发板_Pandora
定时器
ADC
GD32
flashDB
socket
中断
编译报错
Debug
rt_mq_消息队列_msg_queue
SFUD
keil_MDK
msh
ulog
C++_cpp
MicroPython
本月问答贡献
踩姑娘的小蘑菇
7
个答案
2
次被采纳
a1012112796
18
个答案
1
次被采纳
Ryan_CW
5
个答案
1
次被采纳
红枫
4
个答案
1
次被采纳
张世争
4
个答案
1
次被采纳
本月文章贡献
YZRD
3
篇文章
6
次点赞
catcatbing
3
篇文章
6
次点赞
lizimu
2
篇文章
9
次点赞
qq1078249029
2
篇文章
2
次点赞
xnosky
2
篇文章
1
次点赞
回到
顶部
发布
问题
分享
好友
手机
浏览
扫码手机浏览
投诉
建议
回到
底部
