RTT移植到LPC1752上的相关问题！

发布于 2011-11-10 21:44:10 浏览：4095 订阅该版

硬件：LPC1752（zlg开发板） + CF卡 （多余的IO脚已经悬空）
软件：RTT0.4.0RC for LPC176x 堆地址已经改成 0x10004000 rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x10004000); 
问题：跟踪发现每次都在rt_device_init_all中初始化串口1或者串口2或者串口3的Fdiv = ( pclk / 16 ) / UART0_BAUDRATE;处直接跳入fault_rvds的rt_hw_hard_fault    PROC再跳入硬件异常函数。初始化函数没有问题已经脱离RTT在工程中用过，软件仿真的时候能正常通过rt_device_init_all，怀疑是和硬件那里冲突，一时找不到！下面是初始化函数和异常响应的。finsh在串口0，去掉所有串口驱动则不会进入硬件异常。
```
static rt_err_t rt_uart_init (rt_device_t dev)
{
rt_uint32_t Fdiv;
rt_uint32_t pclkdiv, pclk;

/* Init UART Hardware */
LPC_PINCON->PINSEL0 &= ~0x000000F0;
LPC_PINCON->PINSEL0 |= 0x00000050;  /* RxD0 is P0.3 and TxD0 is P0.2 */
/* By default, the PCLKSELx value is zero, thus, the PCLK for
all the peripherals is 1/4 of the SystemFrequency. */
/* Bit 6~7 is for UART0 */
pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03;
switch ( pclkdiv )
{
  case 0x00:
  default:
pclk = SystemCoreClock/4;
break;
  case 0x01:
pclk = SystemCoreClock;
break; 
  case 0x02:
pclk = SystemCoreClock/2;
break; 
  case 0x03:
pclk = SystemCoreClock/8;
break;
}

LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( pclk / 16 ) / UART0_BAUDRATE; /*baud rate */
    LPC_UART0->DLM = Fdiv / 256;   <==================== 此行跳入硬件异常，屏蔽后下面一行也进入到异常
    LPC_UART0->DLL = Fdiv % 256;
LPC_UART0->LCR = 0x03; /* DLAB = 0 */
    LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
 
/* Ensure a clean start, no data in either TX or RX FIFO. */
while (( LPC_UART0->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
while ( LPC_UART0->LSR & LSR_RDR )
{
Fdiv = LPC_UART0->RBR; /* Dump data from RX FIFO */
}
LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */

return RT_EOK;
}
```
psr: 0x00000000
 pc: 0x00000000
 lr: 0x00000000
r12: 0x00000000
r03: 0x00000000
r02: 0x00000000
r01: 0x00000000
r00: 0x00000000
hard fault on thread: (NULL)
 thread  pri  status      sp     stack size max used   left tick  error
-------- ---- ------- ---------- ---------- ---------- ---------- ---